In traditional technology, a propel link gate (PLG) wiring in the liquid crystal display panel is mainly used to transmit the signals output from the source integrated circuit (IC) to the gate IC, or to transmit the signals between at least two gate ICs. Usually, the PLG wiring is arranged at the periphery of a liquid crystal display panel, and prepared on the same layer as a gate line, the bottom electrode line of a storage capacitor. The manufacturing process is as follows: preparing a metallic film on the array substrate, and forming a gate line, a storage capacitor electrode line as well as a PLG wiring through a patterning process.
Because the resistance of the PLG wiring is required to be less than an upper limit value so as not to impact picture quality of a liquid crystal display, at least the following matters were found by the inventor in the process of designing and preparing the above PLG wiring.
Firstly, in designing a PLG wiring, and in order that the designed PLG wiring has resistance less than the upper limit value, an extremely fine mapping for the PLG wiring is needed when drawing a PCB layout, and further, the shape of the PLG wiring needs to be modified continuously to meet the requirement for the upper limit value, which increases the complication of the design of a PCB layout; secondly, during an actual manufacturing process, technical deviation sometimes causes the resistance of the PLG wiring to be greater than the upper limit value, and in order to avoid such technical deviation, the requirements for the manufacture technology are improved.